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Modelling Engineer / System Simulation Engineer

Connect Airecruitment — Netherlands · Posted ~3 hours ago

Senior Full-time Hybrid Visa History ✓

Skills

C++ System modelling System simulation Cycle-accurate modelling Bit-accurate modelling DSP DAC/ADC signal chains SystemVerilog UVM Python RTL verification Hardware-software integration RTL

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Summary ✨ AI‑Generated

Work as a Modelling Engineer on advanced hardware and control systems, developing accurate system-level simulations that connect hardware, firmware, and software. Responsibilities include cycle- and bit-accurate C++ models, signal-chain and DSP modelling, timing and synchronization models, integration with SystemVerilog/UVM and Python test environments, and investigation of differences between models and RTL implementations.

Highlights

Hands-on engineering role with a salary of up to €95,000 plus benefits, focused on advanced system modelling and simulation for quantum computing hardware and control systems. The position bridges hardware, firmware, and software and offers deep technical work with C++, SystemVerilog/UVM, Python, DSP, and verification environments.

Description

Modelling Engineer / System Simulation Engineer Hybrid Salary: Up to €95,000 + benefits We are working with an innovative deep-tech scale-up developing advanced hardware and control systems for quantum computing. They are looking for a Modelling Engineer to join their Verification & Modelling team in Delft. This is a hands-on engineering role focused on building accurate system-level models and simulations that bridge hardware, firmware and software. What You'll Be Doing Develop cycle-accurate and bit-accurate C++ models of complex hardware systems.Model DAC/ADC signal chains, DSP pipelines and sequencer logic.Develop models for timing, synchronisation and control/readout protocols.Integrate models into SystemVerilog/UVM and Python-based test environments.Compare models against RTL implementations and investigate discrepancies.Support simulation and co-simulation activities across hardware and software.Develop and maintain modelling standards, methodologies and reusable components.Work closely with FPGA, digital design, verification, embedded software and systems engineering teams. What We're Looking For Degree in Electrical Engineering, Computer Engineering, Physics, Applied Mathematics or a related discipline.Strong experience with modern C++ (C++11/14/17 or later).Experience with DSP, signal processing or digital hardware systems.Strong understanding of hardware behavioural, functional or architectural modelling.Experience with SystemVerilog and/or UVM and hardware verification.Experience with Git, build systems, unit testing and code reviews.Strong analytical and problem-solving skills.Excellent English communication skills. Alternative Backgrounds Considered We'd also be interested in hearing from engineers currently working as: DSP Engineers | FPGA/DSP Engineers | Hardware Modelling Engineers | System Simulation Engineers | Hardware Verification Engineers | Digital Design Engineers | ASIC Verification Engineers | System-Level Modelling Engineers