Senior FPGA and ASIC Design Engineer

Job Title: Sr Electrical Engineer - FPGA & ASIC Design Solutions Rate: $113/hr on W2 Duration: 12 months Location: Cedar Rapids, IA (Primary) & El- Segundo, CA Clearance: Active Secret required (Top Secret acceptable if willing to work at Secret level) Duration: 1 year (extension likely) On-site Requirement: Full-time, on-site, air‑gapped lab environment About the Role FPGA Design Solutions team supporting next‑generation military communications and high‑reliability digital systems. We are seeking experienced and motivated Senior Electrical or Computer Engineers with strong FPGA design or verification backgrounds to contribute across requirements capture, digital architecture, RTL design, verification, and lab integration. Key Responsibilities Design & Architecture: - Requirements capture and development of FPGA digital architectures - RTL design and implementation in VHDL or Verilog - Timing analysis and closure on high‑speed digital systems - Resource trade‑off analysis and design optimization Verification: - Testbench development using VHDL or SystemVerilog / UVM - Functional verification of RTL blocks and subsystems - Support constrained-random, functional coverage, and best‑practice verification methodologies Integration & Lab Work: - Hands-on FPGA validation using advanced lab equipment - Work within secure, air‑gapped environments for system bring-up - Integration support with multidisciplinary engineering teams Required Qualifications - Active Secret clearance at start - Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field - Expertise in FPGA design and/or verification - Strong VHDL experience - Proficiency with AMD/Xilinx (preferred) or Intel/Altera FPGA tools, Modelsim, Synopsys, and/or FPGA vendor toolchains - Experience with high‑speed digital systems, interfaces, and signal processing - Ability to work independently and communicate clearly in documentation and presentations - Strong hands‑on lab experience (non‑negotiable)